100MHz,CPPLC4L-B6-100.0TS,CPPL4,Cardinal正方型鐘振，美國進(jìn)口晶振，Cardinal卡迪納爾晶振，型號：CPPL4系列，編碼為CPPLC4L-B6-100.0TS，電壓：3.3V，頻率為：100MHz，工作溫度范圍：0℃至+70℃，頻率穩(wěn)定性：±100ppm，CMOS輸出晶振，尺寸為：13.2x13.2x5.6mm金屬DIP封裝，有源晶振，石英晶振，石英晶體振蕩器，時鐘振蕩器。應(yīng)用程序：驅(qū)動A/D，D/As，F(xiàn)PGAs，數(shù)字視頻，以太網(wǎng)，GbE，醫(yī)療設(shè)備，存儲區(qū)域網(wǎng)絡(luò)，COTS，寬帶接入，SONET/SDH/DWDM，測試和測量。
100MHz,CPPLC4L-B6-100.0TS,CPPL4,Cardinal正方型鐘振，產(chǎn)品特點：
•CMOS輸出（將與TTL設(shè)備接口）
•啟用/禁用功能（可選待機(jī)功能）
•3.3V或5.0V標(biāo)稱電源電壓振蕩器
•半DIP封裝，工廠編程
100MHz,CPPLC4L-B6-100.0TS,CPPL4,Cardinal正方型鐘振,參數(shù)表
| Electrical Characteristics CPPL4參數(shù)說明 | |||||||
| Parameter | Min | Typ | Max | Unit | Condition | ||
| Frequency Range |
|
100 |
|
MHz | (3.3V : 1-100MHz) | ||
| Frequency Stability | 2 | ±25 | - | ±100 | ppm | For all supply voltages, load changes, aging for 1 year at 25°C ± 2°C, shock, vibration and temperatures. | |
|
|
|
0 | - | 70 |
|
|
|
| Operating Temperature Range options | 2 | -20 | - | 70 | °C | ||
|
|
|
-40 | - | 85 |
|
||
| Supply Voltage1, 2VDD | 2.97 | - | 5.5 | V | See Part Number options on page 2 | ||
| Supply Current IDD(No Load) | - | - | 45 | mA | VDD= 5.0V | ||
| 25 | VDD= 3.3V | ||||||
|
|
|
Cload = 50pF max, VDD= 4.5~5.5V, ≤ 66MHz | |||||
| Output Type | CMOS | Cload = 25pF max, VDD= 4.5~5.5V, > 66MHz | |||||
|
|
|
Cload = 30pF max, VDD= 2.97~3.63V, ≤ 40MHz | |||||
|
|
|
Cload = 15pF max, VDD= 2.97~3.63V, > 40MHz | |||||
|
|
TTL | Cload = 50pF max; VDD= 4.5~5.5V, ≤ 40MHz | |||||
| Duty Cycle | - | - | - | % | See Page 2 | ||
| Output VOH(TTL Level) | 2.4 | - | - | V | VDD= 4.5~5.5V | ||
| (CMOS Level) | VDD- 0.4 |
|
|
V | All voltages | ||
| Output VOL | - | - | 0.4 | V | See Load Circuit and waveform page | ||
| Output TRISEand TFALL | - | - | - | ns | See page 2 | ||
| Startup Time | - | - | 2 | ms | Time for output to reach specified frequency | ||
| VDISABLE | - | - | 0.8 0.2VDD |
|
VDD= 4.5~5.5V | ||
| V | VDD= 2.97~3.63V | ||||||
|
|
VDD= 4.5~5.5V | ||||||
| VENABLE | 2.0 0.7VDD | - |
|
|
VDD= 2.97~3.63V | ||
| Enable Time | - | - | 2 | ms |
|
||
| Disable Time - Pin 1 low to Output Hi-Z |
|
T/2 | T+10 | ns | T = Frequency Period | ||
| - | |||||||
| Disable Current | - | - | - | mA | Enable/Disable: Pad 1 low, output disabled; See above Supply Cur- rent | ||
| - | 0.4 | - | Standby option: Pad 1 low, output disabled, oscillator shutdown | ||||
| RMS Period Jitter | - | 8 | 11 | ps |
|
||
| Period Jitter, Pk-Pk |
|
65 | 99 | ps | >1,000,000 samples | ||
| 65 | 80 | ≤ 33MHz | |||||
|
|
|
> 33MHz | |||||
| Storage Temperature Range | -55 | - | 125 | °C |
|
||
100MHz,CPPLC4L-B6-100.0TS,CPPL4,Cardinal正方型鐘振,尺寸圖
| 進(jìn)口晶振 | 品牌 | 系列 | 頻率 | Description描述 |
| CPPLC5-A7BR-19.6608PD | Cardinal晶振 | FIPO™ CPPL | 19.6608MHz | OSC XO 19.6608MHZ CMOS SMD |
| CPPLC5-A7BR-25.6TS | Cardinal晶振 | FIPO™ CPPL | 25.6MHz | OSC XO 25.60MHZ CMOS SMD |
| CPPLC5L-A5B6-66.666TS | Cardinal晶振 | FIPO™ CPPL | 66.666MHz | OSC XO 66.666MHZ CMOS SMD |
| CPPLC5L-A5BP-125.0TS | Cardinal晶振 | FIPO™ CPPL | 125MHz | OSC XO 125.000MHZ CMOS SMD |
| CPPLC5L-A7BP-28.9767TS | Cardinal晶振 | FIPO™ CPPL | 28.9767MHz | OSC XO 28.9767MHZ CMOS SMD |
| CPPLC5L-A7BR-100.0TS | Cardinal晶振 | FIPO™ CPPL | 100MHz | OSC XO 100.000MHZ CMOS SMD |
| CPPLC5L-A7BR-27.0TS | Cardinal晶振 | FIPO™ CPPL | 27MHz | OSC XO 27.000MHZ CMOS SMD |
| CPPLC5L-A7BR-34.4064TS | Cardinal晶振 | FIPO™ CPPL | 34.4064MHz | OSC XO 34.4064MHZ CMOS SMD |
| CPPLC5LT-A5B6-120.0TS | Cardinal晶振 | FIPO™ CPPL | 120MHz | OSC XO 120.000MHZ CMOS SMD |
| CPPLC5LZ-A7BP-20.0TS | Cardinal晶振 | FIPO™ CPPL | 20MHz | OSC XO 20.000MHZ CMOS SMD |
| CPPLC5LZ-A7BR-16.0TS | Cardinal晶振 | FIPO™ CPPL | 16MHz | OSC XO 16.000MHZ CMOS SMD |
| CPPLC5-A7BD-27.0TS | Cardinal晶振 | FIPO™ CPPL | 27MHz | OSC XO 27.000MHZ CMOS SMD |
| CPPLC1-B6-24.0TS | Cardinal晶振 | FIPO™ CPPL | 24MHz | OSC XO 24.000MHZ CMOS PC PIN |
| CPPLC1-BP-155.52PD | Cardinal晶振 | FIPO™ CPPL | 155.52MHz | OSC XO 155.52MHZ CMOS PC PIN |
| CPPLC1L-A5BR-13.56TS | Cardinal晶振 | FIPO™ CPPL | 13.56MHz | OSC XO 13.56MHZ CMOS PC PIN |
| CPPLC4-B6-16.896TS | Cardinal晶振 | FIPO™ CPPL | 16.896MHz | OSC XO 16.896MHZ CMOS PC PIN |
| CPPLC4-B6-3.6864TS | Cardinal晶振 | FIPO™ CPPL | 3.6864MHz | OSC XO 3.6864MHZ CMOS PC PIN |
| CPPLC4L-B6-100.0TS | Cardinal晶振 | FIPO™ CPPL | 100MHz | OSC XO 100.000MHZ CMOS PC PIN |
| CPPLC4L-BR-37.5TS | Cardinal晶振 | FIPO™ CPPL | 37.5MHz | OSC XO 37.50MHZ CMOS PC PIN |
| CPPLC4T-A7BR-10.6656TS | Cardinal晶振 | FIPO™ CPPL | 10.6656MHz | OSC XO 10.6656MHZ CMOS PC PIN |
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